CS8351 – Digital Principles and System Design – Regulation 2017 Syllabus

CS8351 – NOTES & QP

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SEMESTER QP CLICK HERE

CS8351 – SYLLABUS

UNIT I BOOLEAN ALGEBRA AND LOGIC GATES

Number Systems — Arithmetic Operations — Binary Codes- Boolean Algebra and Logic Gates — Theorems and Properties of Boolean Algebra — Boolean Functions — Canonical and Standard Forms — Simplification of Boolean Functions using Karnaugh Map — Logic Gates — NAND and NOR Implementations.

UNIT II COMBINATIONAL LOGIC

Combinational Circuits — Analysis and Design Procedures — Binary Adder-Subtractor — Decimal Adder — Binary Multiplier — Magnitude Comparator — Decoders — Encoders — Multiplexers — Introduction to HDL — HDL Models of Combinational circuits.

UNIT III SYNCHRONOUS SEQUENTIAL LOGIC

Sequential Circuits — Storage Elements: Latches , Flip-Flops — Analysis of Clocked Sequential Circuits — State Reduction and Assignment — Design Procedure — Registers and Counters — HDL Models of Sequential Circuits.

UNIT IV ASYNCHRONOUS SEQUENTIAL LOGIC

Analysis and Design of Asynchronous Sequential Circuits — Reduction of State and Flow Tables — Race-free State Assignment — Hazards.

UNIT V MEMORY AND PROGRAMMABLE LOGIC

RAM — Memory Decoding — Error Detection and Correction — ROM — Programmable Logic Array — Programmable Array Logic — Sequential Programmable Devices.

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